1. Field of the Invention
The present invention relates to a semiconductor device in which a characteristic of a lateral PNP transistor is improved, and to a method of manufacturing the semiconductor device.
2. Description of the Related Art
As an example of a conventional semiconductor device, a following lateral PNP transistor has been known. In the lateral PNP transistor, an N type epitaxial region of a low impurity concentration is formed on a P type semiconductor substrate. An N type impurity buried region is formed so as to extend in the P type semiconductor substrate and the N type epitaxial region. A first N type impurity region is formed in the epitaxial region. The impurity concentration of the first N type impurity region is two to three times higher than that of the N type epitaxial region. Moreover, a second N type impurity region as a base region, a first P type impurity region as an emitter region, a second P type impurity region as a collector region are formed in the first N type impurity region. This technology is described, for instance, in Japanese Patent Application Publication No. Hei 5 (1993)-144830 (Page 2, and FIG. 1).
As another example of the conventional semiconductor device, a following lateral PNP transistor has been known. In the lateral PNP transistor, an N type epitaxial layer is formed on a P type semiconductor substrate. An N type buried diffusion layer is formed so as to extend in the P type semiconductor substrate and the N type epitaxial layer. An N type diffusion layer as a base region, a P type diffusion layer as an emitter region, and a P type diffusion layer as a collector region are formed in the N type epitaxial layer. The P type diffusion layer as the collector region is circularly formed around the P type diffusion layer as the emitter region. This technology is described, for instance, in Japanese Patent Application Publication No. 2004-95781 (Pages 4-5, and FIG. 1).
As an example of a conventional method of manufacturing a semiconductor device, the following method of manufacturing an NPN transistor has been known. Firstly, an N type single crystal silicon substrate is prepared, and a thermal oxide film is formed on the substrate. The thermal oxide film is patterned, and an opening is accordingly formed in the thermal oxide film on a region where a P type diffusion layer is to be formed. Then, a liquid source containing both boron (B) and platinum (Pt) which serves as a lifetime killer substance is applied to the substrate to form a diffusion-source film. Subsequently, the boron (B) and platinum (Pt) are diffused from the diffusion-source film into the substrate by heat treatment at 1000° C. to 1050° C. in a non-oxidation atmosphere. This technology is described, for instance, in Japanese Patent Application Publication No. Hei 2 (1990)-135737 (Pages 2-3, and FIG. 1).
As another example of the conventional method of manufacturing a semiconductor device, the following method of manufacturing a transistor has been known. Firstly, in a semiconductor substrate as a collector, a diffusion layer as a base region, and a diffusion layer as an emitter region are formed. Then, a silicon oxide film is formed on the substrate, and an opening is formed in the silicon oxide film on a region where a diode is to be formed. Subsequently, a liquid source containing platinum (Pt) as a lifetime killer substance is applied to the substrate to form a diffusion-source film. Thereafter, the platinum (Pt) is diffused from the diffusion-source film into the substrate by heat treatment at 800° C. to 1000° C. in a non-oxidation atmosphere. This technology is described, for instance, in Japanese Patent Application Publication No. Hei 4 (1992)-85934 (Page 3, and FIG. 1).
As described above, in the conventional semiconductor device, the first N type impurity region as the base region is formed in the N type epitaxial region. The concentration of the first N type impurity region is two to three times higher than that of the N type epitaxial region. With this structure of the lateral PNP transistor, the concentration of the base region is affected by the concentration of the N type impurity region, and thus the current-amplification factor of the lateral PNP transistor is stabilized. Nevertheless, the first N type impurity region used as the base region has a high impurity concentration, resulting in a problem that the breakdown voltage characteristic of the lateral PNP transistor is deteriorated.
Moreover, in the conventional semiconductor device, the P type diffusion layer as the collector region is circularly formed around the P type diffusion layer as the emitter region in the N type epitaxial layer. This structure makes it possible to efficiently place the P type diffusion layer as the collector region in relation to the P type diffusion layer as the emitter region. Specifically, by reducing the width of the base region (separation distance between the emitter and collector regions), the current-amplification factor of the lateral PNP transistor can be increased. In contrast, when the value of the current-amplification factor of the lateral PNP transistor becomes too high by using the N type epitaxial layer of the low impurity concentration as the base region, it is possible to manage the situation by increasing the width of the base region (separation distance between the emitter and collector regions). In this case, there is a problem that the device size of the lateral PNP transistor becomes too large.
Furthermore, in the conventional method of manufacturing a semiconductor device, the liquid source containing platinum (Pt) as the lifetime killer substance is applied to the substrate to form the diffusion-source film. Thereafter, the platinum (Pt) is diffused from the diffusion-source film into the substrate by heat treatment in the non-oxidation atmosphere. At this time, there is a problem that the use of the platinum (Pt) results in an increase in the specific resistance of the region where the N type impurities are diffused.